1. Field of the Invention
This invention relates to improvements in methods and circuitry for rephasing a signal, and, more particularly, to improvements in methods and circuitry for rephasing an input signal based upon an error signal voltage, for use, for example, in rephasing a voltage controlled clock signal, or the like.
2. Relevant Background
Many circuits that depend upon or use clock signals have an adjustable delay circuit to delay the clock pulse by an adjustable amount. One such circuit includes an adjustable delay element that receives and delays the input signal to produce an output that is connected to a phase lock loop, which generates a clock signal. The clock signal is fed back to a multiplier that multiplies it by the input signal. The product is a phase error current signal, which is applied to the delay circuit to control the delay thereof. Thus, the phase of the clock is adjusted relative to the input signal to maintain a constant phase delay value.
This function is called clock rephasing. The result of this closed loop system achieves both a frequency and phase alignment of the signal and clock at the multiplier.
The previous delay methods used the error current directly to adjust a ramp current that is used to delay the input signal to achieve the desired phase of the output signal. However, using such techniques has several disadvantages. More specifically, the initialization of the delay circuit that is associated with such delay method involves fairly complicated analysis. In particular, the circuitry that may be associated with the overall delay circuitry may itself have numerous circuits that have inherent delay creating effects. In order to eliminate the effects of such delay creating circuits an overall rephasing circuit, for example, currents in the delay circuitry need to be determined. However, the overall delay is generally regarded as being inversely proportional to a sum of correcting currents. Moreover, each of the correcting currents may influence the delays that are associated with the various delay creating circuits. Thus, the cancellation of the delays can be an extremely complex problem.